The manufacture of electronic circuit boards typically comprises two basic stages, i.e. board assembly and test. The test stage is typically performed as in-circuit testing and/or functional testing.
In-circuit testing verifies that the board has been assembled correctly. Ideally, it requires probing access to all component nodes on the board.
Functional testing performs an operational check to confirm that the circuit board operates as designed. Functional testing picks up any defects that an incomplete in-circuit test may have missed. There is a general trend in electronics testing away from in-circuit testing towards functional testing.
One key area in electronic circuit board manufacturing is that of personal computer (PC) motherboards. The manufacture of PC motherboards accounts for a significant percentage of total world-wide electronic manufacture. In PC motherboards, functional test access is generally via a board's connectors, so probe access is not essential. These connectors are designed to accept cables or other cards, so access is not normally a significant issue, as connectors are pre-placed there during assembly for access. In a test situation, connection to these connectors may be made manually or by automated means.
Current functional test practices require long test times, are labor intensive, and require complex engineering set up. For example, a current PC motherboard functional test process as typically might be situated at the end of an assembly line is currently performed using a complete system test. In such a complete system test a full set of peripherals, e.g. mouse, keyboard, hard disk, floppy disk, CD-ROM, is connected to the Unit Under Test (UUT), the PC is then booted to the operating system e.g. Microsoft Windows, and from the operating system a set of test programs is run. This test may be repeated later when the board has been assembled in its final housing.
This method of testing has a number of major deficiencies:                1. Test Time is long, typically 3-10 minutes per board. The main reasons for this are that the motherboard must be booted to the operating system first before testing can begin, the process is slowed by the speed of access to peripherals e.g. Hard disk access and read times, and because the testing is performed through the operating system most of the testing pertains to the peripheral and not the actual mother board under test. A further reason is that the test process is slowed is that the processor must determine during the boot sequence what devices and what configurations are present, e.g. the memory count seen when a computer is switched on.        2. Typically the average assembly rate of motherboards is sub-one minute. In order for the functional test section of the production line to keep up with the rest of the production line multiple testers are required. Thus increasing the cost of testing and the amount of floor space required for the functional test section.        3. Because there are multiple testers, tester operation is always manual or semi-automatic, i.e. there is no single flow in the process which may be automated.        4. If a board fails, the results give no indication of the nature of the failure. Thus when a board fails the manufacturer must perform a complete set of additional tests to determine and if possible repair the non functioning mother boards.        
Electronic test systems per se are frequently used for diagnosis in the repair of electronic circuits. In a simple electronic test system, one or more test signals are applied to a unit under test (UUT) and the response of the unit is measured at one or more locations. Potential faults may be identified by comparing the responses obtained from the circuit under test with those of an ideally functioning circuit. However, these methods are generally restricted to use in repair and are unsuitable for use in a manufacturing line. Examples of these methods of testing microprocessor systems include:                1. “Scope and grope testing”,        2. ROM (Read Only Memory) emulation,        3. Microprocessor emulation using cycle stealing, and        4. Microprocessor testing using the debug port of the processor.        
In “scope and grope” testing, a technician determines the location or nature of a fault using one or more of a multiplicity of techniques, including for example continuity testing. In doing so, the technician isolates problems or faults using a combination of skill, experience, persistence and luck, but without the assistance of any automated testing. Particularly with complex boards such as microprocessor based boards, this type of testing in the repair environment is time consuming, requires experienced technicians and, in most situations, is uneconomic. In a manufacturing environment, this technique is completely out of place as the technique is used to find faults on a faulty board and not to test whether a board is working.
With ROM emulation, the boot-up ROM is replaced by a ROM emulator circuit. The boot-up ROM contains the initializing program to be run by a microprocessor each time it is switched on or reset. The ROM emulation circuit also provides a microprocessor with a program, but the program is designed as a diagnostic program rather than as a strict initializing program. Responses of the microprocessor and circuit to this program can be measured at various locations in the circuit. Typically, these ROM emulation circuits return test result information through the emulation circuit. This test information is processed by a computer for viewing on screen or for automatic highlighting of potential failures. A disadvantage of ROM emulation is that the method still possesses the problems of the existing method used in manufacture, i.e. connection to peripherals, etc. A further disadvantage is that the information must be returned through the ROM emulation circuit.
EP-A-0,191,632 describes the use of a method for returning data through the emulation circuit, wherein logic circuitry in the ROM emulator permits test data to be read over the system address bus (the data bus cannot be used in this instance since data cannot be written to a ROM device).
U.S. Pat. No. 4,622,647 discloses a gripper for use in conjunction with ROM emulation circuits. The gripper is connectable to a microprocessor and permits measurement of logic signals at the terminals of the microprocessor. This method does not necessarily rely on a diagnostic program in the ROM emulation circuit to return data, but typically does require such a program in order to run a test. The method described provides reliable data only from the microprocessor. The reliability of data from other locations relies on the integrity of components and connections, while in addition, the reliability of gripper connections is typically not high and false indications of errors are likely to occur frequently due to bad connections.
In microprocessor emulation using cycle stealing, as described in EP-A-0,067,510, the microprocessor in the circuit under test is replaced by a test circuit containing a similar microprocessor. This is unrealistic in the manufacturing environment where the purpose of the test is to ensure the board and processor are functioning correctly. Some chips permit an alternative method of disabling a chip by switching a particular input to a specific state. Typically this is achieved by placing a test clip over the processor. During testing, the test device interrupts the unit under test, injects a read or write cycle, collects the result, and then removes itself (logically not physically) from the buses of the unit under test. In addition, where the microprocessor has been disabled, rather than removed, a gripper or similar feature must be connected on top of the processor so as to connect with all the pins on the microprocessor. This is a troublesome method, and frequently failures will be highlighted by the test system arising not from a fault in the circuit under test but from a faulty connection between the gripper and microprocessor. Furthermore, the microprocessor itself is not tested using this technique.
Microprocessor testing using the debug port is a method only available for use with certain types of microprocessors, i.e. those that have a debug port. In this method, the test system connects directly to the processor in the unit under test via the processor's debug port. The electronic test system may connect to the debug port via either a port connector on the unit under test or an interposer card which sits between the processor and its socket. An advantage of this method is that the test system need only connect to a small number of pins on the microprocessor. Accordingly the possibility of an error arising from a poor connection with the test system is reduced. The technique suffers nonetheless from the requirement that peripheral devices be connected to completely test the system. The technique also provides no way of testing the busses of a processor circuit board.
Irish Patent Application No. 1576/89 discloses the use of a probe with a ROM emulation system. The probe enables signals to be detected at various locations around a circuit and returned for display on a computer system along with the results of the ROM emulation circuit. Thus faults can be localized, once they have been highlighted by another test method. In testing, the probe may be positioned by hand at the correct location and repositioned as required. This is useful where a single track is faulty, and the probe is used to find that track or the location on a track of a fault. However the technique is of no practical use in a manufacturing test environment but rather only in a test/repair environment.
A further problem with testing processor circuit boards arises because of energy saving features provided on processor circuit boards. These features typically place sections of the processor circuit board and peripheral devices into a sleep (low power mode) at certain times to conserve power, for example to preserve battery life, government regulations (e.g. US energy star requirements) and/or environmental reasons. A difficulty testing these features is that a wake up event must be generated in order to test the removing of these circuits from sleep mode. A further signal may also be required to place the system into sleep mode before the waking up process may be tested. Typically, the wake up event is performed by a test person pressing a key on a keyboard. Accordingly, the possibility of automating the test process is difficult.
Accordingly, there is a need for an improved system and method of testing circuit boards and in particular processor circuit boards (motherboards) for computers in the manufacturing process.